PIC18F45K80-I Datasheet, PDF (153/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN and nanoWatt XLP Technology

PIC18F66K80 FAMILY
REGISTER 10-5: PIR2: PERIPHERAL INTERRUPT REQUEST (FLAG) REGISTER 2
R/W-0
U-0
U-0
U-0
R/W-0
R/W-0
R/W-0
OSCFIF
—
—
—
BCLIF
HLVDIF
TMR3IF
bit 7
R/W-0
TMR3GIF
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
bit 6-4
bit 3
bit 2
bit 1
bit 0
OSCFIF: Oscillator Fail Interrupt Flag bit
1 = Device oscillator failed, clock input has changed to INTOSC (bit must be cleared in software)
0 = Device clock is operating
Unimplemented: Read as ‘0’
BCLIF: Bus Collision Interrupt Flag bit
1 = A bus collision occurred (bit must be cleared in software)
0 = No bus collision occurred
HLVDIF: High/Low-Voltage Detect Interrupt Flag bit
1 = A low-voltage condition occurred (bit must be cleared in software)
0 = The device voltage is above the regulator’s low-voltage trip point
TMR3IF: TMR3 Overflow Interrupt Flag bit
1 = TMR3 register overflowed (bit must be cleared in software)
0 = TMR3 register did not overflow
TMR3GIF: TMR3 Gate Interrupt Flag bit
1 = Timer gate interrupt occurred (bit must be cleared in software)
0 = No timer gate interrupt occurred
 2010-2012 Microchip Technology Inc.
DS39977F-page 153