PIC18F45K80-I Datasheet, PDF (163/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN and nanoWatt XLP Technology

PIC18F66K80 FAMILY
REGISTER 10-15: IPR2: PERIPHERAL INTERRUPT PRIORITY REGISTER 2
R/W-1
U-0
U-0
U-0
R/W-1
R/W-1
R/W-1
OSCFIP
—
—
—
BCLIP
HLVDIP
TMR3IP
bit 7
R/W-1
TMR3GIP
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
bit 6-4
bit 3
bit 2
bit 1
bit 0
OSCFIP: Oscillator Fail Interrupt Priority bit
1 = High priority
0 = Low priority
Unimplemented: Read as ‘0’
BCLIP: Bus Collision Interrupt Priority bit
1 = High priority
0 = Low priority
HLVDIP: High/Low-Voltage Detect Interrupt Priority bit
1 = High priority
0 = Low priority
TMR3IP: TMR3 Overflow Interrupt Priority bit
1 = High priority
0 = Low priority
TMR3GIP: TMR3 Gate Interrupt Priority bit
1 = High priority
0 = Low priority
 2010-2012 Microchip Technology Inc.
DS39977F-page 163