PIC18F45K80-I Datasheet, PDF (100/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN and nanoWatt XLP Technology

PIC18F66K80 FAMILY
TABLE 5-4: INITIALIZATION CONDITIONS FOR ALL REGISTERS (CONTINUED)
Register
Applicable Devices
Power-on
Reset,
Brown-out
Reset
MCLR Resets,
WDT Reset,
RESET Instruction,
Stack Resets
Wake-up via
WDT
or Interrupt
RXF12SIDH
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXF11EIDL
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXF11EIDH
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXF11SIDL
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxx- x-xx
uuu- u-uu
uuu- u-uu
RXF11SIDH
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXF10EIDL
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXF10EIDH
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXF10SIDL
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxx- x-xx
uuu- u-uu
uuu- u-uu
RXF10SIDH
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXF9EIDL
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXF9EIDH
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXF9SIDL
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxx- x-xx
uuu- u-uu
uuu- u-uu
RXF9SIDH
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXF8EIDL
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXF8EIDH
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXF8SIDL
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxx- x-xx
uuu- u-uu
uuu- u-uu
RXF8SIDH
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXF7EIDL
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXF7EIDH
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXF7SIDL
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxx- x-xx
uuu- u-uu
uuu- u-uu
RXF7SIDH
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXF6EIDL
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXF6EIDH
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXF6SIDL
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxx- x-xx
uuu- u-uu
uuu- u-uu
RXF6SIDH
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 xxxx xxxx
uuuu uuuu
uuuu uuuu
RXFCON0
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000
0000 0000
uuuu uuuu
RXFCON1
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000
0000 0000
uuuu uuuu
BRGCON3
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 00-- -000
00-- -000
uu-- -uuu
BRGCON2
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000
0000 0000
uuuu uuuu
BRGCON1
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000
0000 0000
uuuu uuuu
TXERRCNT
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000
0000 0000
uuuu uuuu
RXERRCNT
PIC18F2XK80 PIC18F4XK80 PIC18F6XK80 0000 0000
0000 0000
uuuu uuuu
Legend: u = unchanged; x = unknown; - = unimplemented bit, read as ‘0’; q = value depends on condition.
Shaded cells indicate conditions do not apply for the designated device.
Note 1:
2:
One or more bits in the INTCONx or PIRx registers will be affected (to cause wake-up).
When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the PC is loaded with the interrupt
vector (0008h or 0018h).
3: When the wake-up is due to an interrupt and the GIEL or GIEH bit is set, the TOSU, TOSH and TOSL are
updated with the current value of the PC. The STKPTR is modified to point to the next location in the hardware
stack.
4: See Table 5-3 for Reset value for specific conditions.
5: Bits 6 and 7 of PORTA, LATA and TRISA are enabled, depending on the oscillator mode selected. When not
enabled as PORTA pins, they are disabled and read as ‘0’.
DS39977F-page 100
 2010-2012 Microchip Technology Inc.