PIC18F45K80-I Datasheet, PDF(386/622 Page) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN and nanoWatt XLP Technology

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PIC18F45K80-I Datasheet, PDF (386/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN and nanoWatt XLP Technology

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PIC18F66K80 FAMILY

The module is enabled by setting the HLVDEN bit

(HLVDCON<4>). Each time the HLVD module is

enabled, the circuitry requires some time to stabilize.

The IRVST bit (HLVDCON<5>) is a read-only bit used

to indicate when the circuit is stable. The module can

only generate an interrupt after the circuit is stable and

IRVST is set.

The VDIRMAG bit (HLVDCON<7>) determines the

overall operation of the module. When VDIRMAG is

cleared, the module monitors for drops in VDD below a

predetermined set point. When the bit is set, the

module monitors for rises in VDD above the set point.

26.1 Operation

When the HLVD module is enabled, a comparator uses

an internally generated reference voltage as the set

point. The set point is compared with the trip point,

where each node in the resistor divider represents a

trip point voltage. The âtrip pointâ voltage is the voltage

level at which the device detects a high or low-voltage

event, depending on the configuration of the module.

When the supply voltage is equal to the trip point, the

voltage tapped off of the resistor array is equal to the

internal reference voltage generated by the voltage

reference module. The comparator then generates an

interrupt signal by setting the HLVDIF bit.

The trip point voltage is software programmable to any one

of 16 values. The trip point is selected by programming the

HLVDL<3:0> bits (HLVDCON<3:0>).

The HLVD module has an additional feature that allows

the user to supply the trip voltage to the module from an

external source. This mode is enabled when bits,

HLVDL<3:0>, are set to â1111â. In this state, the

comparator input is multiplexed from the external input

pin, HLVDIN. This gives users the flexibility of configur-

ing the High/Low-Voltage Detect interrupt to occur at

any voltage in the valid operating range.

FIGURE 26-1:

HLVD MODULE BLOCK DIAGRAM (WITH EXTERNAL INPUT)

Externally Generated

Trip Point

VDD

VDD

HLVDL<3:0>

HLVDCON

Register

HLVDIN

HLVDEN

VDIRMAG

Set

HLVDIF

HLVDEN

BOREN<1:0>

DS39977F-page 386

Internal Voltage

Reference

1.024V Typical

ï£ 2010-2012 Microchip Technology Inc.

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