PIC18F45K80-I Datasheet, PDF (256/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN and nanoWatt XLP Technology

PIC18F66K80 FAMILY
19.1 CCP Module Configuration
Each Capture/Compare/PWM module is associated
with a control register (generically, CCPxCON) and a
data register (CCPRx). The data register, in turn, is
comprised of two 8-bit registers: CCPRxL (low byte)
and CCPRxH (high byte). All registers are both
readable and writable.
19.1.1
CCP MODULES AND TIMER
RESOURCES
The CCP modules utilize Timers, 1 through 4, varying
with the selected mode. Various timers are available to
the CCP modules in Capture, Compare or PWM
modes, as shown in Table 19-1.
TABLE 19-1: CCP MODE – TIMER
RESOURCE
CCP Mode
Timer Resource
Capture
Compare
PWM
Timer1 or Timer3
Timer2 or Timer4
The assignment of a particular timer to a module is
determined by the Timer to CCP enable bits in the
CCPTMRS register (see Register 19-2). All of the
modules may be active at once and may share the
same timer resource if they are configured to operate
in the same mode (Capture/Compare or PWM) at the
same time.
The CCPTMRS register selects the timers for CCP
modules, 2, 3, 4 and 5. The possible configurations are
shown in Table 19-2.
TABLE 19-2: TIMER ASSIGNMENTS FOR CCP MODULES 2, 3, 4 AND 5
CCPTMRS Register
CCP2
CCP3
CCP4
CCP5
Capture/
C2TSEL Compare
Mode
PWM
Mode
C3TSEL
Capture/
Compare
Mode
PWM
Mode
Capture/
C4TSEL Compare
Mode
PWM
Mode
Capture/
C5TSEL Compare
Mode
PWM
Mode
0
TMR1 TMR2
0
1
TMR3 TMR4
1
TMR1 TMR2
0
TMR3 TMR4
1
TMR1 TMR2 0 0
TMR3 TMR4 0 1
TMR1 TMR2
TMR3 TMR4
19.1.2 OPEN-DRAIN OUTPUT OPTION
When operating in Output mode (the Compare or PWM
modes), the drivers for the CCPx pins can be optionally
configured as open-drain outputs. This feature allows
the voltage level on the pin to be pulled to a higher level
through an external pull-up resistor and allows the
output to communicate with external circuits without the
need for additional level shifters.
The open-drain output option is controlled by the
CCPxOD bits (ODCON<6:2>). Setting the appropriate
bit configures the pin for the corresponding module for
open-drain operation.
DS39977F-page 256
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