PIC18F45K80-I Datasheet, PDF (562/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN and nanoWatt XLP Technology

PIC18F66K80 FAMILY
31.6.3 TIMING DIAGRAMS AND SPECIFICATIONS
FIGURE 31-4:
EXTERNAL CLOCK TIMING
Q4
Q1
Q2
Q3
OSC1
CLKO
1
3
3
2
Q4
Q1
4
4
TABLE 31-6: EXTERNAL CLOCK TIMING REQUIREMENTS
Param.
No.
Symbol
Characteristic
Min
Max Units
Conditions
1A
1
2
3
4
Note 1:
FOSC
External CLKIN
Frequency⁽¹⁾
DC
64
MHz EC, ECIO Oscillator mode
Oscillator Frequency⁽¹⁾
DC
4
MHz RC Oscillator mode
0.1
4
MHz XT Oscillator mode
4
16
MHz HS Oscillator mode
4
16
MHz HS + PLL Oscillator mode
5
33
kHz LP Oscillator mode
TOSC
External CLKIN Period⁽¹⁾
15.6
—
ns EC, ECIO Oscillator mode
Oscillator Period⁽¹⁾
250
—
ns RC Oscillator mode
250
10,000
ns XT Oscillator mode
40
250
ns HS Oscillator mode
62.5
250
ns HS + PLL Oscillator mode
5
200
s LP Oscillator mode
TCY
Instruction Cycle Time⁽¹⁾
62.5
—
ns TCY = 4/FOSC
TOSL,
External Clock in (OSC1)
30
TOSH
High or Low Time
2.5
—
ns XT Oscillator mode
—
s LP Oscillator mode
10
—
ns HS Oscillator mode
TOSR, External Clock in (OSC1)
—
TOSF
Rise or Fall Time
—
20
ns XT Oscillator mode
50
ns LP Oscillator mode
—
7.5
ns HS Oscillator mode
Instruction cycle period (TCY) equals four times the input oscillator time base period for all configurations
except PLL. All specified values are based on characterization data for that particular oscillator type under
standard operating conditions with the device executing code. Exceeding these specified limits may result
in an unstable oscillator operation and/or higher than expected current consumption. All devices are tested
to operate at “min.” values with an external clock applied to the OSC1/CLKIN pin. When an external clock
input is used, the “max.” cycle time limit is “DC” (no clock) for all devices.
DS39977F-page 562
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