PIC18F45K80-I Datasheet, PDF (331/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN and nanoWatt XLP Technology

PIC18F66K80 FAMILY
TABLE 21-4: REGISTERS ASSOCIATED WITH I²C™ OPERATION
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
INTCON
GIE/GIEH PEIE/GIEL TMR0IE INT0IE
RBIE
TMR0IF INT0IF
RBIF
PIR1
PSPIF
ADIF
RC1IF
TX1IF
SSPIF TMR1GIF TMR2IF TMR1IF
PIE1
PSPIE
ADIE
RC1IE
TX1IE
SSPIE TMR1GIE TMR2IE TMR1IE
IPR1
PSPIP
ADIP
RC1IP
TX1IP
SSPIP TMR1GIP TMR2IP TMR1IP
PIR2
OSCFIF
—
—
—
BCLIF
HLVDIF TMR3IF TMR3GIF
PIE2
OSCFIE
—
—
—
BCLIE
HLVDIE TMR3IE TMR3GIE
IPR2
OSCFIP
—
—
—
BCLIP
HLVDIP TMR3IP TMR3GIP
TRISC
TRISC7 TRISC6 TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0
SSPBUF
SSPADD
SSPMSK⁽¹⁾
MSSP Receive Buffer/Transmit Register
MSSP Address Register (I²C™ Slave mode),
MSSP Baud Rate Reload Register (I²C Master mode)
MSK7
MSK6
MSK5
MSK4
MSK3
MSK2
MSK1
MSK0
SSPCON1
WCOL SSPOV SSPEN
CKP
SSPM3 SSPM2 SSPM1 SSPM0
SSPCON2
GCEN ACKSTAT ACKDT ACKEN
RCEN
PEN
RSEN
SEN
GCEN ACKSTAT ADMSK5⁽²⁾ ADMSK4⁽²⁾ ADMSK3⁽²⁾ ADMSK2⁽²⁾ ADMSK1⁽²⁾ SEN
SSPSTAT
SMP
CKE
D/A
P
S
R/W
UA
BF
PMD0
CCP5MD CCP4MD CCP3MD CCP2MD CCP1MD UART2MD UART1MD SSPMD
ODCON
Legend:
Note 1:
2:
SSPOD CCP5OD CCP4OD CCP3OD CCP2OD CCP1OD U2OD
U1OD
— = unimplemented, read as ‘0’. Shaded cells are not used by the MSSP module in I²C™ mode.
SSPMSK shares the same address in SFR space as SSPADD, but is only accessible in certain I²C™
Slave operating modes in 7-Bit Masking mode. See Section 21.4.3.4 “7-Bit Address Masking Mode” for
more details.
Alternate bit definitions for use in I²C Slave mode operations only.
 2010-2012 Microchip Technology Inc.
DS39977F-page 331