PIC18F45K80-I Datasheet, PDF (390/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN and nanoWatt XLP Technology

PIC18F66K80 FAMILY
26.6 Operation During Sleep
When enabled, the HLVD circuitry continues to operate
during Sleep. If the device voltage crosses the trip
point, the HLVDIF bit will be set and the device will
wake-up from Sleep. Device execution will continue
from the interrupt vector address if interrupts have
been globally enabled.
26.7 Effects of a Reset
A device Reset forces all registers to their Reset state.
This forces the HLVD module to be turned off.
TABLE 26-1: REGISTERS ASSOCIATED WITH HIGH/LOW-VOLTAGE DETECT MODULE
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
HLVDCON VDIRMAG BGVST
IRVST HLVDEN HLVDL3 HLVDL2 HLVDL1 HLVDL0
INTCON
GIE/GIEH PEIE/GIEL TMR0IE INT0IE
RBIE
TMR0IF INT0IF
RBIF
PIR2
OSCFIF
—
—
—
BCLIF HLVDIF TMR3IF TMR3GIF
PIE2
OSCFIE
—
—
—
BCLIE HLVDIE TMR3IE TMR3GIE
IPR2
OSCFIP
—
—
—
BCLIP HLVDIP TMR3IP TMR3GIP
TRISA
TRISA7⁽¹⁾ TRISA6⁽¹⁾ TRISA5
—
TRISA3 TRISA2 TRISA1 TRISA0
Legend: — = unimplemented, read as ‘0’. Shaded cells are not used by the HLVD module.
Note 1: PORTA<7:6> and their direction bits are individually configured as port pins based on various primary
oscillator modes. When disabled, these bits read as ‘0’.
DS39977F-page 390
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