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PIC18F45K80-I Datasheet, PDF (203/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN and nanoWatt XLP Technology
PIC18F66K80 FAMILY
REGISTER 12-3: MDCARH: MODULATION HIGH CARRIER CONTROL REGISTER
R/W-0
R/W-x
R/W-x
U-0
MDCHODIS MDCHPOL MDCHSYNC
—
bit 7
R/W-x
MDCH3(1)
R/W-x
MDCH2(1)
R/W-x
MDCH1(1)
R/W-x
MDCH0(1)
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
bit 6
bit 5
bit 4
bit 3-0
MDCHODIS: Modulator High Carrier Output Disable bit
1 = Output signal driving the peripheral output pin (selected by MDCH<3:0>) is disabled
0 = Output signal driving the peripheral output pin (selected by MDCH<3:0>) is enabled
MDCHPOL: Modulator High Carrier Polarity Select bit
1 = Selected high carrier signal is inverted
0 = Selected high carrier signal is not inverted
MDCHSYNC: Modulator High Carrier Synchronization Enable bit
1 = Modulator waits for a falling edge on the high time carrier signal before allowing a switch to the
low time carrier
0 = Modulator output is not synchronized to the high time carrier signal(1)
Unimplemented: Read as ‘0’
MDCH<3:0> Modulator Data High Carrier Selection bits(1)
1111-1001 = Reserved
1000 = CCP5 output (PWM Output mode only)
0111 = CCP4 output (PWM Output mode only)
0110 = CCP3 output (PWM Output mode only)
0101 = CCP2 output (PWM Output mode only)
0100 = ECCP1 output (PWM Output mode only)
0011 = Reference clock module signal
0010 = MDCIN2 port pin
0001 = MDCIN1 port pin
0000 = VSS
Note 1: Narrowed carrier pulse widths or spurs may occur in the signal stream if the carrier is not synchronized.
 2010-2012 Microchip Technology Inc.
DS39977F-page 203