PIC18F45K80-I Datasheet, PDF (303/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN and nanoWatt XLP Technology

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21.4.3.4 7-Bit Address Masking Mode
Unlike 5-bit masking, 7-Bit Address Masking mode
uses a mask of up to 8 bits (in 10-bit addressing) to
define a range of addresses that can be Acknowl-
edged, using the lowest bits of the incoming address.
This allows the module to Acknowledge up to
127 different addresses with 7-bit addressing, or
255 with 10-bit addressing (see Example 21-3). This
mode is the default configuration of the module, which
is selected when MSSPMSK is unprogrammed (‘1’).
The address mask for 7-Bit Address Masking mode is
stored in the SSPMSK register, instead of the
SSPCON2 register. SSPMSK is a separate hardware
register within the module, but it is not directly address-
able. Instead, it shares an address in the SFR space
with the SSPADD register. To access the SSPMSK reg-
ister, it is necessary to select MSSP mode, ‘1001’
(SSPCON1<3:0> = 1001) and then read or write to the
location of SSPADD.
To use 7-Bit Address Masking mode, it is necessary to
initialize SSPMSK with a value before selecting the I²C
Slave Addressing mode. Thus, the required sequence
of events is:
1. Select
SSPMSK
Access
mode
(SSPCON2<3:0> = 1001).
2. Write the mask value to the appropriate
SSPADD register address (FC8h).
3. Set the appropriate I²C Slave mode
(SSPCON2<3:0> = 0111 for 10-bit addressing,
0110 for 7-bit addressing).
Setting or clearing mask bits in SSPMSK behaves in
the opposite manner of the ADMSKx bits in 5-Bit
Address Masking mode. That is, clearing a bit in
SSPMSK causes the corresponding address bit to be
masked; setting the bit requires a match in that
position. SSPMSK resets to all ‘1’s upon any Reset
condition and, therefore, has no effect on the standard
MSSP operation until written with a mask value.
With 7-bit addressing, SSPMSK<7:1> bits mask the
corresponding address bits in the SSPADD register.
For any SSPMSK bits that are active (SSPMSK<n> = 0),
the corresponding SSPADD address bit is ignored
(SSPADD<n> = x). For the module to issue an address
Acknowledge, it is sufficient to match only on
addresses that do not have an active address mask.
With 10-bit addressing, SSPMSK<7:0> bits mask the
corresponding address bits in the SSPADD register.
For any SSPMSK bits that are active (= 0), the
corresponding SSPADD address bit is ignored
(SSPADD<n> = x).
Note:
The two Most Significant bits of the
address are not affected by address
masking.
EXAMPLE 21-3: ADDRESS MASKING EXAMPLES IN 7-BIT MASKING MODE
7-Bit Addressing:
SSPADD<7:1> = 1010 000
SSPMSK<7:1> = 1111 001
Addresses Acknowledged = ACh, A8h, A4h, A0h
10-Bit Addressing:
SSPADD<7:0> = 1010 0000 (The two MSb are ignored in this example since they are not affected)
SSPMSK<5:1> = 1111 0011
Addresses Acknowledged = ACh, A8h, A4h, A0h
 2010-2012 Microchip Technology Inc.
DS39977F-page 303