PIC18F45K80-I Datasheet, PDF (82/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN and nanoWatt XLP Technology

PIC18F66K80 FAMILY
5.4 Brown-out Reset (BOR)
The PIC18F66K80 family has four BOR Power modes:
• High-Power BOR
• Medium Power BOR
• Low-Power BOR
• Zero-Power BOR
Each power mode is selected by the BORPWR<1:0>
setting (CONFIG2L<6:5>). For low, medium and
high-power BOR, the module monitors the VDD depend-
ing on the BORV<1:0> setting (CONFIG1L<3:2>). The
typical current draw (IBOR) for zero, low and medium
power BOR is 200 nA, 750 nA and 3 A, respectively. A
BOR event re-arms the Power-on Reset. It also causes
a Reset, depending on which of the trip levels has been
set: 1.8V, 2V, 2.7V or 3V.
BOR is enabled by BOREN<1:0> (CONFIG2L<2:1>)
and the SBOREN bit (RCON<6>). The four BOR
configurations are summarized in Table 5-1.
In Zero-Power BOR (ZPBORMV), the module monitors
the VDD voltage and re-arms the POR at about 2V.
ZPBORMV does not cause a Reset, but re-arms the
POR.
The BOR accuracy varies with its power level. The lower
the power setting, the less accurate the BOR trip levels
are. Therefore, the high-power BOR has the highest
accuracy and the low-power BOR has the lowest accu-
racy. The trip levels (BVDD, Parameter D005), current
consumption (Section 31.2 “DC Characteristics:
Power-Down and Supply Current PIC18F66K80
Family (Industrial/Extended)”) and time required
below BVDD (TBOR, Parameter 35) can all be found in
Section 31.0 “Electrical Characteristics”.
5.4.1 SOFTWARE ENABLED BOR
When BOREN<1:0> = 01, the BOR can be enabled or
disabled by the user in software. This is done with the
control bit, SBOREN (RCON<6>). Setting SBOREN
enables the BOR to function as previously described.
Clearing SBOREN disables the BOR entirely. The
SBOREN bit operates only in this mode; otherwise it is
read as ‘0’.
Placing the BOR under software control gives the user
the additional flexibility of tailoring the application to its
environment without having to reprogram the device to
change BOR configuration. It also allows the user to
tailor device power consumption in software by elimi-
nating the incremental current that the BOR consumes.
While the BOR current is typically very small, it may
have some impact in low-power applications.
Note:
Even when BOR is under software con-
trol, the Brown-out Reset voltage level is
still set by the BORV<1:0> Configuration
bits; it cannot be changed in software.
5.4.2 DETECTING BOR
When Brown-out Reset is enabled, the BOR bit always
resets to ‘0’ on any Brown-out Reset or Power-on
Reset event. This makes it difficult to determine if a
Brown-out Reset event has occurred just by reading
the state of BOR alone. A more reliable method is to
simultaneously check the state of both POR and BOR.
This assumes that the POR bit is reset to ‘1’ in software
immediately after any Power-on Reset event. IF BOR
is ‘0’ while POR is ‘1’, it can be reliably assumed that a
Brown-out Reset event has occurred.
5.4.3 DISABLING BOR IN SLEEP MODE
When BOREN<1:0> = 10, the BOR remains under
hardware control and operates as previously
described. Whenever the device enters Sleep mode,
however, the BOR is automatically disabled. When the
device returns to any other operating mode, BOR is
automatically re-enabled.
This mode allows for applications to recover from
brown-out situations, while actively executing code,
when the device requires BOR protection the most. At
the same time, it saves additional power in Sleep mode
by eliminating the small incremental BOR current.
TABLE 5-1: BOR CONFIGURATIONS
BOR Configuration
BOREN1 BOREN0
Status of
SBOREN
(RCON<6>)
BOR Operation
0
0
Unavailable BOR is disabled; must be enabled by reprogramming the Configuration
bits.
0
1
Available BOR is enabled in software; operation is controlled by SBOREN.
1
0
Unavailable BOR is enabled in hardware, in Run and Idle modes; disabled during
Sleep mode.
1
1
Unavailable BOR is enabled in hardware; must be disabled by reprogramming the
Configuration bits.
DS39977F-page 82
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