PIC18F45K80-I Datasheet, PDF (56/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN and nanoWatt XLP Technology

PIC18F66K80 FAMILY
3.3 Clock Sources and
Oscillator Switching
Essentially, PIC18F66K80 family devices have these
independent clock sources:
• Primary oscillators
• Secondary oscillators
• Internal oscillator
The primary oscillators can be thought of as the main
device oscillators. These are any external oscillators
connected to the OSC1 and OSC2 pins, and include
the External Crystal and Resonator modes and the
External Clock modes. If selected by the FOSC<3:0>
Configuration bits (CONFIG1H<3:0>), the internal
oscillator block may be considered a primary oscillator.
The internal oscillator block can be one of the following:
• 31 kHz LF-INTOSC source
• 31 kHz to 500 kHz MF-INTOSC source
• 31 kHz to 16 MHz HF-INTOSC source
The particular mode is defined by the FOSCx
Configuration bits. The details of these modes are
covered in Section 3.5 “External Oscillator Modes”.
The secondary oscillators are external clock
sources that are not connected to the OSC1 or OSC2
pin. These sources may continue to operate, even
after the controller is placed in a power-managed
mode. PIC18F66K80 family devices offer the SOSC
(Timer1/3/5/7) oscillator as a secondary oscillator
source.
The SOSC can be enabled from any peripheral that
requests it. The SOSC can be enabled several ways by
doing one of the following:
• The SOSC is selected as the source by either of
the odd timers, which is done by each respective
SOSCEN bit (TxCON<3>)
• The SOSC is selected as the CPU clock source
by the SCSx bits (OSCCON<1:0>)
• The SOSCGO bit is set (OSCCON2<3>)
The SOSCGO bit is used to warm up the SOSC so that
it is ready before any peripheral requests it.
The secondary oscillator has three Run modes. The
SOSCSEL<1:0> bits (CONFIG1L<4:3>) decide the
SOSC mode of operation:
• 11 = High-Power SOSC Circuit
• 10 = Digital (SCLKI) mode
• 11 = Low-Power SOSC Circuit
If a secondary oscillator is not desired and digital I/O on
port pins, RC0 and RC1, is needed, the SOSCSELx
bits must be set to Digital mode.
In addition to being a primary clock source in some
circumstances, the internal oscillator is available as a
power-managed mode clock source. The LF-INTOSC
source is also used as the clock source for several
special features, such as the WDT and Fail-Safe Clock
Monitor. The internal oscillator block is discussed in
more detail in Section 3.6 “Internal Oscillator
Block”.
The PIC18F66K80 family includes features that allow
the device clock source to be switched from the main
oscillator, chosen by device configuration, to one of the
alternate clock sources. When an alternate clock
source is enabled, various power-managed operating
modes are available.
3.3.1 OSC1/OSC2 OSCILLATOR
The OSC1/OSC2 oscillator block is used to provide the
oscillator modes and frequency ranges:
Mode
Design Operating Frequency
LP
XT
HS
EC
EXTRC
31.25-100 kHz
100 kHz to 4 MHz
4 MHz to 25 MHz
0 to 64 MHz (external clock)
0 to 4 MHz (external RC)
The crystal-based oscillators (XT, HS and LP) have a
built-in start-up time. The operation of the EC and
EXTRC clocks is immediate.
3.3.2 CLOCK SOURCE SELECTION
The System Clock Select bits, SCS<1:0>
(OSCCON<1:0>), select the clock source. The avail-
able clock sources are the primary clock defined by the
FOSC<3:0> Configuration bits, the secondary clock
(SOSC oscillator) and the internal oscillator. The clock
source changes after one or more of the bits is written
to, following a brief clock transition interval.
The OSTS (OSCCON<3>) and SOSCRUN
(OSCCON2<6>) bits indicate which clock source is
currently providing the device clock. The OSTS bit
indicates that the Oscillator Start-up Timer (OST) has
timed out and the primary clock is providing the device
clock in primary clock modes. The SOSCRUN bit indi-
cates when the SOSC oscillator (from Timer1/3/5/7) is
providing the device clock in secondary clock modes.
In power-managed modes, only one of these bits will
be set at any time. If neither of these bits is set, the
INTOSC is providing the clock or the internal oscillator
has just started and is not yet stable.
The IDLEN bit (OSCCON<7>) determines if the device
goes into Sleep mode or one of the Idle modes when
the SLEEP instruction is executed.
DS39977F-page 56
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