PIC18F45K80-I Datasheet, PDF (234/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN and nanoWatt XLP Technology

PIC18F66K80 FAMILY
17.2 Timer4 Interrupt
The Timer4 module has an eight-bit Period register,
PR4, that is both readable and writable. Timer4 incre-
ment from 00h until it matches PR4 and then resets to
00h on the next increment cycle. The PR4 register is
initialized to FFh upon Reset.
FIGURE 17-1:
TIMER4 BLOCK DIAGRAM
17.3 Output of TMR4
The outputs of TMR4 (before the postscaler) are used
only as a PWM time base for the ECCP modules. They
are not used as baud rate clocks for the MSSP module
as is the Timer2 output.
T4OUTPS<3:0>
T4CKPS<1:0>
FOSC/4
4
2
1:1, 1:4, 1:16
Prescaler
Internal Data Bus
Reset
TMR4
8
1:1 to 1:16
Postscaler
TMRx/PRx
Match
Comparator
8
Set TMR4IF
TMR4 Output
(to PWM)
PR4
8
TABLE 17-1: REGISTERS ASSOCIATED WITH TIMER4 AS A TIMER/COUNTER
Name
Bit 7
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
INTCON
IPR4
PIR4
PIE4
TMR4
T4CON
PR4
PMD1
Legend:
GIE/GIEH PEIE/GIEL TMR0IE
INT0IE
RBIE
TMR0IF INT0IF
TMR4IP
EEIP
CMP2IP CMP1IP
—
CCP5IP CCP4IP
TMR4IF
EEIF
CMP2IF CMP1IF
—
CCP5IF CCP4IF
TMR4IE
EEIE
CMP2IE CMP1IE
—
CCP5IE CCP4IE
Timer4 Register
—
T4OUTPS3 T4OUTPS2 T4OUTPS1 T4OUTPS0 TMR4ON T4CKPS1
Timer4 Period Register
PSPMD CTMUMD ADCMD TMR4MD TMR3MD TMR2MD TMR1MD
— = unimplemented, read as ‘0’. Shaded cells are not used by the Timer4 module.
RBIF
CCP3IP
CCP3IF
CCP3IE
T4CKPS0
TMR0MD
DS39977F-page 234
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