PIC18F45K80-I Datasheet, PDF (433/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN and nanoWatt XLP Technology

PIC18F66K80 FAMILY
27.2.5
CAN MODULE I/O CONTROL
REGISTER
This register controls the operation of the CAN module’s
I/O pins in relation to the rest of the microcontroller.
REGISTER 27-55: CIOCON: CAN I/O CONTROL REGISTER
R/W-0
R/W-0
R/W-0
R/W-0
U-0
U-0
TX2SRC
TX2EN
ENDRHI⁽¹⁾ CANCAP
—
—
bit 7
U-0
R/W-0
—
CLKSEL
bit 0
Legend:
R = Readable bit
-n = Value at POR
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
bit 6
bit 5
bit 4
bit 3-1
bit 0
TX2SRC: CANTX2 Pin Data Source bit
1 = CANTX2 pin will output the CAN clock
0 = CANTX2 pin will output CANTX
TX2EN: CANTX Pin Enable bit
1 = CANTX2 pin will output CANTX or CAN clock as selected by the TX2SRC bit
0 = CANTX2 pin will have digital I/O function
ENDRHI: Enable Drive High bit⁽¹⁾
1 = CANTX pin will drive VDD when recessive
0 = CANTX pin will be tri-state when recessive
CANCAP: CAN Message Receive Capture Enable bit
1 = Enable CAN capture; CAN message receive signal replaces input on RC2/CCP1
0 = Disable CAN capture; RC2/CCP1 input to CCP1 module
Unimplemented: Read as ‘0’
CLKSEL: CAN Clock Source Selection bit
1 = Use the oscillator as the source of the CAN system clock
0 = Use the PLL as the source of the CAN system clock
Note 1: Always set this bit when using a differential bus to avoid signal crosstalk in CANTX from other nearby pins.
 2010-2012 Microchip Technology Inc.
DS39977F-page 433