PIC18F45K80-I Datasheet, PDF (274/622 Pages) Microchip Technology – 28/40/44/64-Pin, Enhanced Flash Microcontrollers with ECAN and nanoWatt XLP Technology

PIC18F66K80 FAMILY
20.4.1 HALF-BRIDGE MODE
In Half-Bridge mode, two pins are used as outputs to
drive push-pull loads. The PWM output signal is output
on the P1A pin, while the complementary PWM output
signal is output on the P1B pin (see Figure 20-6). This
mode can be used for half-bridge applications, as
shown in Figure 20-7, or for full-bridge applications,
where four power switches are being modulated with
two PWM signals.
In Half-Bridge mode, the programmable dead-band delay
can be used to prevent shoot-through current in
half-bridge power devices. The value of the P1DC<6:0>
bits of the ECCP1DEL register sets the number of
instruction cycles before the output is driven active. If the
value is greater than the duty cycle, the corresponding
output remains inactive during the entire cycle. For more
details on the dead-band delay operations, see
Section 20.4.6 “Programmable Dead-Band Delay
Mode”.
Since the P1A and P1B outputs are multiplexed with
the port data latches, the associated TRIS bits must be
cleared to configure P1A and P1B as outputs.
FIGURE 20-6:
EXAMPLE OF
HALF-BRIDGE PWM
OUTPUT
Period
Period
P1A⁽²⁾
Pulse Width
td
td
P1B⁽²⁾
(1)
(1)
(1)
td = Dead-Band Delay
Note 1: At this time, the TMR2 register is equal to the
PR2 register.
2: Output signals are shown as active-high.
FIGURE 20-7:
EXAMPLE OF HALF-BRIDGE APPLICATIONS
Standard Half-Bridge Circuit (“Push-Pull”)
FET
Driver
+
P1A
-
FET
Driver
P1B
Load
+
-
Half-Bridge Output Driving a Full-Bridge Circuit
FET
Driver
P1A
FET
Driver
P1B
V+
Load
FET
Driver
FET
Driver
DS39977F-page 274
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