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HD6473032F Datasheet, PDF (96/572 Pages) Hitachi Semiconductor – Hitachi Microcomputer | |||
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Bit 7âPriority Level A7 (IPRA7): Selects the priority level of IRQ0 interrupt requests.
Bit 7
IPRA7
0
1
Description
IRQ0 interrupt requests have priority level 0 (low priority)
IRQ0 interrupt requests have priority level 1 (high priority)
(Initial value)
Bit 6âPriority Level A6 (IPRA6): Selects the priority level of IRQ1 interrupt requests.
Bit 6
IPRA6
0
1
Description
IRQ1 interrupt requests have priority level 0 (low priority)
IRQ1 interrupt requests have priority level 1 (high priority)
(Initial value)
Bit 5âPriority Level A5 (IPRA5): Selects the priority level of IRQ2 and IRQ3 interrupt
requests.
Bit 5
IPRA5
0
1
Description
IRQ2 and IRQ3 interrupt requests have priority level 0 (low priority)
IRQ2 and IRQ3 interrupt requests have priority level 1 (high priority)
(Initial value)
Bit 4âPriority Level A4 (IPRA4): Selects the priority level of IRQ4 interrupt requests.
Bit 4
IPRA4 Description
0
IRQ4 interrupt requests have priority level 0 (low priority)
1
IRQ4 interrupt requests have priority level 1 (high priority)
(Initial value)
81
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