HD6473032F Datasheet, PDF (20/572 Pages) Hitachi Semiconductor – Hitachi Microcomputer

1.2 Block Diagram
Figure 1-1 shows an internal block diagram.
MD₁
MD₀
EXTAL
XTAL
ø
STBY
RES
RESO
NMI
P6₅/WR
P6₄/RD
P6₃/AS
P6₀/WAIT
P8₃/IRQ₃
P8₂/IRQ₂
P8₁/IRQ₁
P8₀/IRQ₀
Port 3
Address bus
Data bus (upper)
Data bus (lower)
H8/300H CPU
PROM*
(or masked
ROM)
Interrupt
controller
RAM
16-bit
integrated
timer-pulse unit
(ITU)
Programmable
timing pattern
controller (TPC)
Watchdog
timer
(WDT)
Serial
communication
interface
(SCI) × 1 channel
A/D converter
P5₃/A₁₅
P5₂/A₁₆
P5₁/A₁₇
P5₀/A₁₈
P2₇/A₁₅
P2₆/A₁₄
P2₅/A₁₃
P2₄/A₁₂
P2₃/A₁₁
P2₂/A₁₀
P2₁/A₉
P2₀/A₈
P1₇/A₇
P1₆/A₆
P1₅/A₅
P1₄/A₄
P1₃/A₃
P1₂/A₂
P1₁/A₁
P1₀/A₀
P9₄/SCK/IRQ₄
P9₂/RxD
P9₀/TxD
Port B
Port A
Port 7
Note: PROM version is available only in the H8/3032 Series.
Figure 1-1 Block Diagram
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