HD6473032F Datasheet, PDF (445/572 Pages) Hitachi Semiconductor – Hitachi Microcomputer

17.2.2 AC Characteristics
Bus timing parameters are listed in table 17-4. Control signal timing parameters are listed in
table 17-5. Timing parameters of the on-chip supporting modules are listed in table 17-6.
Table 17-4 Bus Timing (1)
Condition A: V_CC = 2.7 V to 5.5 V, AV_CC = 2.7 V to 5.5 V, V_REF = 2.7 V to AV_CC,
V_SS = AV_SS = 0 V, ø = 2 MHz to 8 MHz, T_a = –20°C to +75°C (regular
specifications), T_a = –40°C to +85°C (wide-range specifications)
Condition B: V_CC = 3.0 V to 5.5 V, AV_CC = 3.0 V to 5.5 V, V_REF = 3.0 V to AV_CC,
V_SS = AV_SS = 0 V, ø = 2 MHz to 10 MHz, T_a = –20°C to +75°C (regular
specifications), T_a = –40°C to +85°C (wide-range specifications)
Condition C: V_CC = 5.0 V ± 10%, AV_CC = 5.0 V ± 10%, V_REF = 4.5 V to AV_CC,
V_SS = AV_SS = 0 V, ø = 2 MHz to 16 MHz, T_a = –20°C to +75°C (regular
specifications), T_a = –40°C to +85°C (wide-range specifications)
Item
Clock cycle time
Clock low pulse width
Clock high pulse width
Clock rise time
Clock fall time
Address delay time
Address hold time
Address strobe delay
time
Write strobe delay time
Strobe delay time
Write data strobe pulse
width 1
Write data strobe pulse
width 2
Address setup time 1
Address setup time 2
Read data setup time
Read data hold time
Symbol
t_CYC
t_CL
t_CH
t_CR
t_CF
t_AD
t_AH
t_ASD
Condition A
8 MHz
Min Max
125 500
40
—
40
—
—
20
—
20
—
60
25
—
—
60
Condition B
10 MHz
Min Max
100 500
40
—
30
—
—
15
—
15
—
50
20
—
—
40
Condition C
16 MHz
Min Max
62.5 500
20
—
20
—
—
10
—
10
—
30
10
—
—
30
Unit
ns
Test
Conditions
Figure 17-4,
Figure 17-5
t_WSD
—
60
—
50
—
30
t_SD
—
60
—
50
—
30
t_WSW1* 85
—
60
—
35
—
t_WSW2* 150 —
110 —
65
—
t_AS1
t_AS2
t_RDS
t_RDH
20
—
15
—
10
—
80
—
65
—
40
—
50
—
35
—
20
—
0
—
0
—
0
—
430