HD6473032F Datasheet, PDF (118/572 Pages) Hitachi Semiconductor – Hitachi Microcomputer

6.1.3 Input/Output Pins
Table 6-1 summarizes the bus controller’s input/output pins.
Table 6-1 Bus Controller Pins
Name
Address strobe
Read
Write
Wait
Abbreviation I/O
AS
Output
RD
Output
WR
Output
WAIT
Input
Function
Strobe signal indicating valid address output on the
address bus
Strobe signal indicating reading from the external
address space
Strobe signal indicating writing to the external
address space, with valid data on the data bus
Wait request signal for access to external three-
state-access areas
6.1.4 Register Configuration
Table 6-2 summarizes the bus controller’s registers.
Table 6-2 Bus Controller Registers
Address* Name
H'FFED Access state control register
H'FFEE Wait control register
H'FFEF Wait state controller enable register
Note: * Lower 16 bits of the address.
Abbreviation R/W
ASTCR
R/W
WCR
R/W
WCER
R/W
Initial Value
H'FF
H'F3
H'FF
103