HD6473032F Datasheet, PDF (58/572 Pages) Hitachi Semiconductor – Hitachi Microcomputer

Table 2-13 Effective Address Calculation
Addressing Mode and
No. Instruction Format
1 Register direct (Rn)
op rm rn
2 Register indirect (@ERn)
op r
Effective Address Calculation
Effective Address
Operand is general
register contents
31
0
23
0
General register contents
3 Register indirect with displacement
@(d:16, ERn)/@(d:24, ERn)
31
0
General register contents
23
0
op r
disp
Sign extension
disp
4 Register indirect with post-increment
or pre-decrement
Register indirect with post-increment 31
0
23
0
@ERn+
General register contents
op r
1, 2, or 4
Register indirect with pre-decrement ³¹
0
@–ERn
General register contents
23
0
op r
1, 2, or 4
1 for a byte operand, 2 for a word
operand, 4 for a longword operand