HD6473032F Datasheet, PDF (150/572 Pages) Hitachi Semiconductor – Hitachi Microcomputer

Port 5 Data Direction Register (P5DDR): P5DDR is an 8-bit write-only register that can select
input or output for each pin in port 5.
7
6
5
4
3
2
1
0
Bit
—
—
—
— P5₃DDR P5₂DDR P5₁DDR P5₀DDR
Initial value
1
1
1
1
0
0
0
0
Read/Write
—
—
—
—
W
W
W
W
Reserved bits
Port 5 data direction 3 to 0
These bits select input or
output for port 5 pins
Mode 1: A pin in port 5 becomes an address output pin if the corresponding P5DDR bit is set to 1,
and a generic input pin if this bit is cleared to 0.
Modes 2 and 3: Port 5 functions as an input/output port. A pin in port 5 becomes an output pin if
the corresponding P5DDR bit is set to 1, and an input pin if this bit is cleared to 0.
P5DDR is a write-only register. Its value cannot be read. All bits return 1 when read.
P5DDR is initialized to H'F0 by a reset and in hardware standby mode. In software standby mode it
retains its previous setting. If a P5DDR bit is set to 1, the corresponding pin maintains its output
state in software standby mode.
Port 5 Data Register (P5DR): P5DR is an 8-bit readable/writable register that stores data for pins
P5₃ to P5₀.
When a bit in P5DDR is set to 1, if port 5 is read the value of the corresponding P5DR bit is
Bit
7
6
5
4
3
2
1
0
—
—
—
—
P5 ₃
P5 ₂
P5 ₁
P5 ₀
Initial value
1
1
1
1
0
0
0
0
Read/Write
—
—
—
—
R/W
R/W
R/W
R/W
Reserved bits
Port 5 data 3 to 0
These bits store data
for port 5 pins
returned directly, regardless of the actual state of the pin. When a bit in P5DDR is cleared to 0, if
port 5 is read the corresponding pin level is read.
135