HD6473032F Datasheet, PDF (156/572 Pages) Hitachi Semiconductor – Hitachi Microcomputer

When a bit in P6DDR is set to 1, if port 6 is read the value of the corresponding P6DR bit is
returned directly. When a bit in P6DDR is cleared to 0, if port 6 is read the corresponding pin level
is read. Bits 7, 6, 2, and 1 are reserved. Bit 7 cannot be modified and always reads 1. Bits 6, 2, and
1 can be written and read, but cannot be used as ports. If bit 6, 2, or 1 in P6DDR is read while its
value is 1, the value of the corresponding bit in P6DR will be read. If bit 6, 2, or 1 in P6DDR is
read while its value is 0, if will always read 1.
P6DR is initialized to H'80 by a reset and in hardware standby mode. In software standby mode it
retains its previous setting.
7.6.3 Pin Functions in Each Mode
Mode 1: P6₅ to P6₃ function as bus control output pins. P6₀ is either a bus control input pin or
generic input/output pin, functioning as an output pin when bit P6₀DDR is set to 1 and an input pin
when this bit is cleared to 0. Figure 7-14 and table 7-9 indicate the pin functions in mode 1.
Port 6
WR (output)
RD (output)
AS (output)
P6₀ (input/output)/WAIT (input)
Figure 7-14 Pin Functions in Mode 1 (Port 6)
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