HD6473032F Datasheet, PDF (262/572 Pages) Hitachi Semiconductor – Hitachi Microcomputer

Figure 8-53 shows an example in which GRB3 is buffered by BRB3 in complementary PWM
mode. Buffering is used to set GRB3 to a higher value than GRA3, generating a PWM waveform
with 0% duty cycle. The BRB3 value is transferred to GRB3 when TCNT3 matches GRA3, and
when TCNT4 underflows.
TCNT3 and
TCNT4 values
H'1FFF
GRA3
TCNT3
TCNT4
GRB3
H'0999
H'0000
BRB3
H'0999
GRB3 H'0999
H'1FFF
H'0999
H'1FFF
TIOCA3
TIOCB3
Time
H'0999
H'1FFF
H'0999
Figure 8-53 Register Buffering (Example 4: Buffering in Complementary PWM Mode)
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