HD6473032F Datasheet, PDF (102/572 Pages) Hitachi Semiconductor – Hitachi Microcomputer

5.2.5 IRQ Sense Control Register (ISCR)
ISCR is an 8-bit readable/writable register that selects level sensing or falling-edge sensing of the
inputs at pins IRQ₄ to IRQ₀.
Bit
Initial value
Read/Write
7
6
5
4
3
2
1
0
—
—
— IRQ4SC IRQ3SC IRQ2SC IRQ1SC IRQ0SC
0
0
0
0
0
0
0
0
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
Reserved bit
IRQ ₄ to IRQ₀ sense control
These bits select level sensing or falling-edge
sensing for IRQ₄ to IRQ₀ interrupts
ISCR is initialized to H'00 by a reset and in hardware standby mode.
Bits 7 to 5—Reserved: These bits can be written and read, but they do not select level or falling-
edge sensing.
Bits 4 to 0—IRQ₄ to IRQ₀ Sense Control (IRQ4SC to IRQ0SC): These bits selects whether
interrupts IRQ₄ to IRQ₀ are requested by level sensing of pins IRQ₄ to IRQ₀, or by falling-edge
sensing.
Bits 4 to 0
IRQ4SC to IRQ0SC Description
0
Interrupts are requested when IRQ₄ to IRQ₀ inputs are low (Initial value)
1
Interrupts are requested by falling-edge input at IRQ₄ to IRQ₀
87