HD6473032F Datasheet, PDF (257/572 Pages) Hitachi Semiconductor – Hitachi Microcomputer

• Complementary PWM mode
The buffer register value is transferred to the general register when TCNT3 and TCNT4
change counting direction. This occurs at the following two times:
— When TCNT3 matches GRA3
— When TCNT4 underflows
• Reset-synchronized PWM mode
The buffer register value is transferred to the general register at compare match A3.
Sample Buffering Setup Procedure: Figure 8-48 shows a sample buffering setup procedure.
Buffering
Select general register functions 1 1. Set TIOR to select the output compare or input
capture function of the general registers.
2. Set bits BFA3, BFA4, BFB3, and BFB4 in TFCR
Set buffer bits
to select buffering of the required general registers.
2 _{3. Set the STR bits to 1 in TSTR to start the timer}
counters.
Start counters
3
Buffered operation
Figure 8-48 Buffering Setup Procedure (Example)
242