HD6473032F Datasheet, PDF (225/572 Pages) Hitachi Semiconductor – Hitachi Microcomputer

Buffering
• If the general register is an output compare register
When compare match occurs the buffer register value is transferred to the general register.
• If the general register is an input capture register
When input capture occurs the TCNT value is transferred to the general register, and the
previous general register value is transferred to the buffer register.
• Complementary PWM mode
The buffer register value is transferred to the general register when TCNT3 and TCNT4
change counting direction.
• Reset-synchronized PWM mode
The buffer register value is transferred to the general register at GRA3 compare match.
8.4.2 Basic Functions
Counter Operation: When one of bits STR0 to STR4 is set to 1 in the timer start register
(TSTR), the timer counter (TCNT) in the corresponding channel starts counting. The counting can
be free-running or periodic.
• Sample setup procedure for counter
Figure 8-14 shows a sample procedure for setting up a counter.
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