HD6473032F Datasheet, PDF (379/572 Pages) Hitachi Semiconductor – Hitachi Microcomputer

1. SCI initialization: the transmit data
Initialize
1
output function of the TxD pin and
receive data input function of the
RxD pin are selected, enabling
Start transmitting and receiving
simultaneous transmitting and
receiving.
2. SCI status check and transmit
Read TDRE flag in SSR
2
data write: read SSR, check that
the TDRE flag is 1, then write
transmit data in TDR and clear
No
the TDRE flag to 0.
TDRE = 1?
Notification that the TDRE flag has
changed from 0 to 1 can also be
Yes
given by the TXI interrupt.
3. Receive error handling: if a receive
Write transmit data in TDR and
clear TDRE flag to 0 in SSR
error occurs, read the ORER flag in
SSR, then after executing the neces-
sary error handling, clear the ORER
flag to 0.
Neither transmitting nor receiving
can resume while the ORER flag
Read ORER flag in SSR
remains set to 1.
4. SCI status check and receive
data read: read SSR, check that
ORER = 1?
Yes
3
the RDRF flag is 1, then read
receive data from RDR and clear
the RDRF flag to 0. Notification
that the RDRF flag has changed
No
Error handling
from 0 to 1 can also be given
by the RXI interrupt.
5. To continue transmitting and
Read RDRF flag in SSR
4
receiving serial data: check the
RDRF flag, read RDR, and clear
the RDRF flag to 0 before the
No
RDRF = 1?
MSB (bit 7) of the current frame
is received. Also check that the
TDRE flag is (bit 7) of the current
Yes
frame is received. Also check that
the TDRE flag is set to 1, indicat-
Read receive data from RDR
and clear RDRF flag to 0 in SSR
ing that data can be written, write
data in TDR, then clear the TDRE
flag to 0 before the MSB (bit 7) of
the current frame is transmitted.
When the DMAC is activated by
a transmit-data-empty interrupt
No
End of transmitting and
5
request (TXI) to write data in TDR,
receiving?
the TDRE flag is checked and
cleared automatically.
Yes
Clear TE and RE bits to 0 in SCR
End
Note: * When switching from transmitting or receiving to simultaneous
transmitting and receiving, clear the TE and RE bits both to 0,
then set the TE and RE bits both to 1.
Figure 11-20 Sample Flowchart for Serial Transmitting
364