HD6473032F Datasheet, PDF (116/572 Pages) Hitachi Semiconductor – Hitachi Microcomputer

Section 6 Bus Controller
6.1 Overview
The H8/3032 Series has an on-chip bus controller that divides the external address space into eight
areas and can assign different bus specifications to each. This enables different types of memory
to be connected easily.
A bus arbitration function of the bus controller controls the operation of the DMA controller
(DMAC) and refresh controller. The bus controller can also release the bus to an external device.
6.1.1 Features
Features of the bus controller are listed below.
• Independent settings for address areas 0 to 7
— 128-kbyte areas in 1-Mbyte mode.
— Areas can be designated for two-state or three-state access.
• Four wait modes
— Programmable wait mode, pin auto-wait mode, and pin wait modes 0 and 1 can be
selected.
— Zero to three wait states can be inserted automatically.
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