HD6473032F Datasheet, PDF (249/572 Pages) Hitachi Semiconductor – Hitachi Microcomputer

In complementary PWM mode, TCNT3 and TCNT4 overshoot and undershoot at the transitions
between up-counting and down-counting. The setting conditions for the IMFA bit in channel 3
and the OVF bit in channel 4 differ from the usual conditions. In buffered operation the buffer
transfer conditions also differ. Timing diagrams are shown in figures 8-37 and 8-38.
TCNT3
GRA3
IMFA
Buffer transfer
signal (BR to GR)
GR
N–1
N
N+1
N
N–1
N
Set to 1
Flag not set
Buffer transfer
Figure 8-37 Overshoot Timing
No buffer transfer
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