HD6473032F Datasheet, PDF (275/572 Pages) Hitachi Semiconductor – Hitachi Microcomputer

Contention between Counter Clearing by Input Capture and Counter Increment: If an input
capture signal and counter increment signal occur simultaneously, the counter is cleared according
to the input capture signal. The counter is not incremented by the increment signal. The value
before the counter is cleared is transferred to the general register. See figure 8-67.
ø
Input capture signal
Counter clear signal
TCNT input clock
TCNT
N
H'0000
GR
N
Figure 8-67 Contention between Counter Clearing by Input Capture and
Counter Increment
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