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HD6473032F Datasheet, PDF (446/572 Pages) Hitachi Semiconductor – Hitachi Microcomputer
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Table 17-4 Bus Timing (cont)
Condition A: VCC = 2.7 V to 5.5 V, AVCC = 2.7 V to 5.5 V, VREF = 2.7 V to AVCC,
VSS = AVSS = 0 V, ø = 2 MHz to 8 MHz, Ta = –20°C to +75°C (regular
specifications), Ta = –40°C to +85°C (wide-range specifications)
Condition B: VCC = 3.0 V to 5.5 V, AVCC = 3.0 V to 5.5 V, VREF = 3.0 V to AVCC,
VSS = AVSS = 0 V, ø = 2 MHz to 10 MHz, Ta = –20°C to +75°C (regular
specifications), Ta = –40°C to +85°C (wide-range specifications)
Condition C: VCC = 5.0 V ± 10%, AVCC = 5.0 V ± 10%, VREF = 4.5 V to AVCC,
VSS = AVSS = 0 V, ø = 2 MHz to 16 MHz, Ta = –20°C to +75°C (regular
specifications), Ta = –40°C to +85°C (wide-range specifications)
Item
Write data delay time
Write data setup time 1
Write data setup time 2
Write data hold time
Read data access
time 1
Read data access
time 2
Read data access
time 3
Read data access
time 4
Precharge time
Wait setup time
Wait hold time
Note is on next page.
Symbol
tWDD
tWDS1
tWDS2
tWDH
tACC1*
Condition A
8 MHz
Min Max
—
75
90
—
5
—
25
—
—
110
Condition B
10 MHz
Min Max
—
75
40
—
–10 —
20
—
—
100
Condition C
16 MHz
Min Max
—
60
15
—
–5
—
20
—
—
55
Unit
ns
Test
Conditions
Figure 17-4,
Figure 17-5
tACC2*
—
230 —
200 —
115
tACC3*
—
55
—
50
—
25
tACC4*
—
160 —
150 —
85
tPCH*
85
—
60
—
40
—
tWTS
40
—
40
—
25
— ns Figure 17-6
tWTH
10
—
10
—
5
—
431
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