HD6473032F Datasheet, PDF (258/572 Pages) Hitachi Semiconductor – Hitachi Microcomputer

Examples of Buffering: Figure 8-49 shows an example in which GRA is set to function as an
output compare register buffered by BRA, TCNT is set to operate as a periodic counter cleared by
GRB compare match, and TIOCA and TIOCB are set to toggle at compare match A and B.
Because of the buffer setting, when TIOCA toggles at compare match A, the BRA value is
simultaneously transferred to GRA. This operation is repeated each time compare match A occurs.
Figure 8-50 shows the transfer timing.
TCNT value
GRB
H'0250
H'0200
H'0100
H'0000
BRA
H'0200
GRA
H'0250
TIOCB
TIOCA
Counter cleared by compare match B
H'0100
H'0200
H'0100
H'0200
H'0200
Time
Toggle
output
Toggle
output
Compare match A
Figure 8-49 Register Buffering (Example 1: Buffering of Output Compare Register)
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