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HD6473032F Datasheet, PDF (348/572 Pages) Hitachi Semiconductor – Hitachi Microcomputer | |||
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Table 11-4 Examples of Bit Rates and BRR Settings in Synchronous Mode
ø (MHz)
Bit Rate
(bits/s)
2
nN
4
nN
8
nN
10
nN
110
3 70 â â â â â â
250
2 124 2 249 3 124 â â
500
1 249 2 124 2 249 â â
1k
1 124 1 249 2 124 â â
2.5 k
0 199 1 99 1 199 1 249
5k
0 99 0 199 1 99 1 124
10 k
0 49 0 99 0 199 0 249
25 k
0 19 0 39 0 79 0 99
50 k
09
0 19 0 39 0 49
100 k
04
09
0 19 0 24
250 k
01
03
07
09
500 k
0 0* 0 1
03
04
1M
0 0* 0 1
ââ
2M
0 0* â â
2.5 M
â â 0 0*
4M
Note: Settings with an error of 1% or less are recommended.
Legend
Blank: No setting available
â: Setting possible, but error occurs
*: Continuous transmit/receive not possible
The BRR setting is calculated as follows:
Asynchronous mode:
N=
ø
à 106 â 1
64 Ã 22nâ1 Ã B
Synchronous mode:
ø
N=
à 106 â 1
8 Ã 22nâ1 Ã B
B: Bit rate (bits/s)
N: BRR setting for baud rate generator (0 ⤠N ⤠255)
ø: System clock frequency (MHz)
n: Baud rate generator clock source (n = 0, 1, 2, 3)
(For the clock sources and values of n, see the table below.)
333
16
nN
ââ
3 249
3 124
2 249
2 99
1 199
1 99
0 159
0 79
0 39
0 15
07
03
01
ââ
0 0*
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