MC68HC908LB8_05 Datasheet, PDF (94/234 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

High Resolution PWM (HRP)
BUSCLK
HRPCLK
CONTROL
REGISTERS
DUAL
FREQUENCY
GENERATOR
DEADTIME GENERATOR
TOP
DEADTIME GENERATOR
BOT
COMPLEMENTARY OUTPUTS
WITH PROGRAMMABLE DEADTIME
DITHERING
CONTROLLER
SHUTDOWN DETECT INPUT
FOR FAST DISABLING
OF OUTPUTS
SHTDWN
Figure 10-3. Block Diagram of High Resolution PWM (HRP)
The HRP comprises four blocks, as follows
1. A dual frequency generator, which generates a pair of complementary PWM output signals. It
allows dithering between two adjacent frequencies or duty cycles to increase the resolution of the
output signal. After deadtime insertion, these signals are routed to the TOP and BOT output pins
2. A dithering controller, or timebase, which sets the dithering cycle time and the percentage of time
spent on each of the dithering frequencies or duty cycles.
3. Two deadtime generators, for inserting deadtime into the output signals.
4. A set of control registers
The HRP can operate in two modes.
1. Variable Frequency Mode: for variation of the output frequency at a fixed 50% duty cycle
2. Variable Duty Cycle Mode: for variation of the duty cycle at a fixed frequency.
10.4.1 The Principle of Frequency Dithering
Frequency dithering is an averaging technique, which can increase the resolution of an output signal by
switching between two frequencies. By varying the time spent on each frequency, the average output
frequency will be a value between the two frequencies. For example, in Figure 10-4 a signal switches
between 10 kHz and 20 kHz over a fixed cycle time. 30% of each cycle is spent at 20 kHz, 70% at 10 kHz.
The equivalent average frequency over time is 13 kHz.
MC68HC908LB8 Data Sheet, Rev. 1
94
Freescale Semiconductor