MC68HC908LB8_05 Datasheet, PDF (207/234 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Break Module (BRK)
Address: $FE00
Bit 7
6
5
Read:
R
R
R
Write:
Reset:
R = Reserved
4
3
2
1
Bit 0
SBSW
R
R
R
Note⁽¹⁾
R
0
1. Writing a 0 clears SBSW.
Figure 19-7. Break Status Register (BSR)
SBSW — SIM Break Stop/Wait
This status bit is useful in applications requiring a return to wait mode after exiting from a break
interrupt. Clear SBSW by writing a 0 to it. Reset clears SBSW.
1 = Wait mode was exited by break interrupt
0 = Wait mode was not exited by break interrupt
SBSW can be read within the break state SWI routine. The user can modify the return address on the
stack by subtracting one from it.
19.2.2.5 Break Flag Control Register
The break control register (BFCR) contains a bit that enables software to clear status bits while the MCU
is in a break state.
Address: $FE03
Bit 7
6
5
4
3
2
1
Bit 0
Read:
BCFE
R
R
R
R
R
R
R
Write:
Reset:
0
R = Reserved
Figure 19-8. Break Flag Control Register (BFCR)
BCFE — Break Clear Flag Enable Bit
This read/write bit enables software to clear status bits by accessing status registers while the MCU is
in a break state. To clear status bits during the break state, the BCFE bit must be set.
1 = Status bits clearable during break
0 = Status bits not clearable during break
19.2.3 Low-Power Modes
The WAIT and STOP instructions put the MCU in low power- consumption standby modes. If enabled,
the break module will remain enabled in wait and stop modes. However, since the internal address bus
does not increment in these modes, a break interrupt will never be triggered.
MC68HC908LB8 Data Sheet, Rev. 1
Freescale Semiconductor
207