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MC68HC908LB8_05 Datasheet, PDF (28/234 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers
Memory
Addr.
Register Name
Bit 7
6
5
4
3
2
1
Bit 0
Data Direction Register C Read:
0
$0006
(DDRC) Write:
0
0
0
0
0
DDRC1 DDRC0
See page 139. Reset:
0
0
0
0
0
0
0
0
$0007
↓
$000C
Unimplemented
$000D
$000E
$000F
↓
$0019
Port A Input Pullup Enable Read:
Register (PTAPUE) Write:
See page 136. Reset:
Port C Input Pullup Enable Read:
Register (PTCPUE) Write:
See page 140. Reset:
0
OSC2EN
0
PTA6PUE PTA5PUE PTA4PUE PTA3PUE PTA2PUE PTA1PUE PTA0PUE
0
0
0
0
0
0
0
0
0
0
0
PTCPUE2 PTCPUE1 PTCPUE0
0
0
0
0
0
0
0
Unimplemented
$001A
$001B
$001D
$001E
Keyboard Status Read:
and Control Register
(INTKBSCR)
Write:
See page 89. Reset:
Keyboard Interrupt Enable Read:
Register (INTKBIER) Write:
See page 90. Reset:
IRQ Status and Control Read:
Register (INTSCR) Write:
See page 84. Reset:
Configuration Register 2 Read:
(CONFIG2)(1)
See page 60.
Write:
Reset:
0
0
0
0
0
IRQPUD
0
0
0
KBIE6
0
0
0
IRQEN
0
0
0
KEYF
0
ACKK
0
0
0
0
KBIE5
KBIE4
KBIE3
KBIE2
0
0
0
0
0
0
IRQF
0
ACK
0
0
0
0
R
OSCOPT1 OSCOPT0
0
0
0
0
0
1. One-time writable register after each reset.
2. RSTEN reset to 0 by a power-on reset (POR) only.
IMASKK MODEK
0
0
KBIE1
0
IMASK
0
0
0
KBIE0
0
MODE
0
RSTEN
0(2)
$001F
Configuration Register 1 Read:
(CONFIG1)(1) Write:
See page 61. Reset:
0
COPRS LVISTOP LVIRSTD LVIPWRD
0
0
0
0
0
1. One-time writable register after reach reset.
SSREC
0
STOP
0
COPD
0
= Unimplemented
Bold = Buffered
R
= Reserved
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 2 of 8)
MC68HC908LB8 Data Sheet, Rev. 1
28
Freescale Semiconductor