MC68HC908LB8_05 Datasheet, PDF (200/234 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Timer Interface Module (TIM)
MSxB:MSxA
X0
X1
00
00
00
01
01
01
1X
1X
1X
Table 18-2. Mode, Edge, and Level Selection
ELSxB:ELSxA
00
00
01
10
11
01
10
11
01
10
11
Mode
Output preset
Input capture
Output compare
or PWM
Buffered output
compare
or buffered PWM
Configuration
Pin under port control;
initial output level high
Pin under port control;
initial output level low
Capture on rising edge only
Capture on falling edge only
Capture on rising or
falling edge
Toggle output on compare
Clear output on compare
Set output on compare
Toggle output on compare
Clear output on compare
Set output on compare
TOVx — Toggle On Overflow Bit
When channel x is an output compare channel, this read/write bit controls the behavior of the channel
x output when the TIM counter overflows. When channel x is an input capture channel, TOVx has no
effect.
Reset clears the TOVx bit.
1 = Channel x pin toggles on TIM counter overflow.
0 = Channel x pin does not toggle on TIM counter overflow.
NOTE
When TOVx is set, a TIM counter overflow takes precedence over a
channel x output compare if both occur at the same time.
CHxMAX — Channel x Maximum Duty Cycle Bit
When the TOVx bit is at 1, setting the CHxMAX bit forces the duty cycle of buffered and unbuffered
PWM signals to 100%. As Figure 18-12 shows, the CHxMAX bit takes effect in the cycle after it is set
or cleared. The output stays at the 100% duty cycle level until the cycle after CHxMAX is cleared.
OVERFLOW
OVERFLOW
OVERFLOW
OVERFLOW
OVERFLOW
PERIOD
TCHx
CHxMAX
OUTPUT
COMPARE
OUTPUT
COMPARE
OUTPUT
COMPARE
OUTPUT
COMPARE
Figure 18-12. CHxMAX Latency
MC68HC908LB8 Data Sheet, Rev. 1
200
Freescale Semiconductor