MC68HC908LB8_05 Datasheet, PDF (144/234 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Pulse Width Modulator with Fault Input (PWM)
Addr.
$0045
$0046
$0047
$0048
$0049
$004A
$004B
$004C
$004D
Register Name
Bit 7
PWM Counter Register High ^{Read: 0}
(PCNTH) Write:
See page 153. _{Reset: 0}
PWM Counter Register Low ^{Read: Bit 7}
(PCNTL) Write:
See page 153. _{Reset: 0}
PWM Counter Modulo Register ^{Read: 0}
High (PMODH) Write:
See page 154. _{Reset: 0}
PWM Counter Modulo Register ^Read: _{Bit 7}
Low (PMODL) Write:
See page 154. _Reset:
PWM 0 Value Register High
(PVAL0H)
See page 154.
Read:
Write:
Reset:
Bit 15
0
PWM 0 Value Register Low ^Read: _{Bit 7}
(PVAL0L) Write:
See page 155. _{Reset: 0}
PWM 1 Value Register High
(PVAL1H)
See page 154.
Read:
Write:
Reset:
Bit 15
0
PWM 1 Value Register Low ^Read: _{Bit 7}
(PVAL1L) Write:
See page 155. _{Reset: 0}
PWM Disable Mapping ^{Read: 0}
Write Once Register Write:
(DISMAP) See page 158. _{Reset: 0}
R
6
5
0
0
4
3
2
1
Bit 0
0
Bit 11
Bit 10
Bit 9
Bit 8
0
0
0
0
0
0
0
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
0
0
0
0
0
0
0
0
0
0
Bit 11
Bit 10
Bit 9
Bit 8
0
0
0
Indeterminate after reset
Bit 6
Bit 5
Bit 4
Bit 3
Bit 2
Bit 1
Bit 0
Bit 14
0
Bit 6
0
Bit 14
0
Bit 6
0
0
Indeterminate after reset
Bit 13
Bit 12
Bit 11
Bit 10
0
0
0
0
Bit 5
Bit 4
Bit 3
Bit 2
0
0
0
0
Bit 13
Bit 12
Bit 11
Bit 10
0
0
0
0
Bit 5
Bit 4
Bit 3
Bit 2
0
0
0
0
0
0
0
0
0
0
= Reserved
0
0
0
Bold = Buffered
Bit 9
Bit 8
0
0
Bit 1
Bit 0
0
0
Bit 9
Bit 8
0
0
Bit 1
Bit 0
0
0
MAP1 MAP0
1
1
Figure 15-3. Register Summary (Continued)
15.3 Timebase
This section provides a discussion of the timebase.
15.3.1 Resolution
For edge-aligned mode, a 12-bit up-only counter is used to create the PWM period. Therefore, the PWM
resolution in edge-aligned mode is one clock (highest resolution is 125 ns @ BUSCLK = 8 MHz) as shown
MC68HC908LB8 Data Sheet, Rev. 1
144
Freescale Semiconductor