MC68HC908LB8_05 Datasheet, PDF (27/234 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

$FE20
↓
$FF7D
$FF7E
$FF7F
↓
$FFBF
$FFC0
$FFC1
↓
$FFDD
$FFDE
↓
$FFFF⁽²⁾
MONITOR ROM
350 BYTES
FLASH BLOCK PROTECT REGISTER (FLBPR)
UNIMPLEMENTED
INTERNAL OSCILLATOR TRIM VALUE
UNIMPLEMENTED
FLASH VECTORS
34 BYTES
1. Attempts to execute code from addresses in these ranges will
generate an illegal address reset.
2. $FFF6–$FFFD used for eight security bytes
Figure 2-1. Memory Map (Continued)
Register Section
Addr.
$0000
$0001
$0002
$0003
Register Name
Port A Data Register ^Read:
(PTA) Write:
See page 134. _Reset:
Port B Data Register ^Read:
(PTB) Write:
See page 136. _Reset:
Port C Data Register ^Read:
(PTC) Write:
See page 138. _Reset:
Reserved
Bit 7
PTB7
0
0
6
PTA6
PTB6
0
0
5
PTA5
PTB5
0
0
4
3
PTA4
PTA3
Unaffected by reset
PTB4
PTB3
Unaffected by reset
0
0
0
0
Reserved
2
PTA2
PTB2
PTC2
0
1
PTA1
PTB1
PTC1
0
Bit 0
PTA0
PTB0
PTC0
0
$0004
$0005
Data Direction Register A ^Read:
(DDRA) Write:
See page 135. _Reset:
Data Direction Register B ^Read:
(DDRB) Write:
See page 137. _Reset:
0
0
DDRB7
0
DDRA6
0
DDRB6
0
DDRA5
0
DDRB5
0
DDRA4
0
DDRB4
0
DDRA3
0
DDRB3
0
DDRA2
0
DDRB2
0
DDRA1
0
DDRB1
0
DDRA0
0
DDRB0
0
= Unimplemented
Bold = Buffered
R
= Reserved
U = Unaffected
Figure 2-2. Control, Status, and Data Registers (Sheet 1 of 8)
MC68HC908LB8 Data Sheet, Rev. 1
Freescale Semiconductor
27