MC68HC908LB8_05 Datasheet, PDF (49/234 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

I/O Registers
1 = Conversion completed (AIEN = 0)
0 = Conversion not completed (AIEN = 0)/CPU interrupt (AIEN = 1)
AIEN — ADC Interrupt Enable Bit
When this bit is set, an interrupt is generated at the end of an ADC conversion. The interrupt signal is
cleared when the data register is read or the status/control register is written. Reset clears the AIEN bit.
1 = ADC interrupt enabled
0 = ADC interrupt disabled
ADCO — ADC Continuous Conversion Bit
When set, the ADC will convert samples continuously and update the ADR register at the end of each
conversion. Only one conversion is completed between writes to the ADSCR when this bit is cleared.
Reset clears the ADCO bit.
1 = Continuous ADC conversion
0 = One ADC conversion
ADCH4–ADCH0 — ADC Channel Select Bits
ADCH4–ADCH0 form a 5-bit field which is used to select one of 7 ADC channels. Only seven channels,
AD6–AD0, are available on this MCU. The channels are detailed in Table 3-1. Care should be taken
when using a port pin as both an analog and digital input simultaneously to prevent switching noise
from corrupting the analog signal. See Table 3-1.
The ADC subsystem is turned off when the channel select bits are all set to 1. This feature allows for
reduced power consumption for the MCU when the ADC is not being used.
NOTE
Recovery from the disabled state requires one conversion cycle to stabilize.
The voltage levels supplied from internal reference nodes, as specified in
Table 3-1, are used to verify the operation of the ADC converter both in production test and for user
applications.
Table 3-1. Mux Channel Select⁽¹⁾
ADCH4
0
0
0
0
0
0
0
0
↓
1
1
1
1
ADCH3
0
0
0
0
0
0
0
1
↓
1
1
1
1
ADCH2
0
0
0
0
1
1
1
0
↓
1
1
1
1
ADCH1
0
0
1
1
0
0
1
0
↓
0
0
1
1
ADCH0
0
1
0
1
0
1
0
0
↓
0
1
0
1
Input Select
PTA0/AD0
PTA1/AD1
PTA2/AD2
PTA3/AD3
PTA4/AD4
PTA6/AD5
PTB7/AD6
Unused
V_REFH(2)
V_REFL(2)
ADC power off
MC68HC908LB8 Data Sheet, Rev. 1
Freescale Semiconductor
49