MC68HC908LB8_05 Datasheet, PDF (93/234 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Functional Description
Addr. Register Name
$0051
HRP Control Register
(HRPCTRL)
See page 105.
Read:
Write:
Reset
$0052
HRP Duty Cycle Register
High (HRPDCH)
See page 107.
Read:
Write:
Reset
$0053
HRP Duty Cycle Register
Low (HRPDCL)
See page 107.
Read:
Write:
Reset
$0054
HRP Period Register High
(HRPPERH)
See page 107.
Read:
Write:
Reset
$0055
HRP Period Register Low
(HRPPERL)
See page 107.
Read:
Write:
Reset
$0056
HRP Deadtime Register
(HRPDT)
See page 108.
Read:
Write:
Reset
$0057
HRP Timebase Register High
(HRPTBH)
See page 108.
Read:
Write:
Reset
$0058
HRP Timebase Register Low
(HRPTBL)
See page 108.
Read:
Write:
Reset
$0059
Frequency Dithering Control
Register (HRPDCR)
See page 109.
Read:
Write:
Reset
Bit 7
DC10
0
DC2
0
P10
0
P2
0
DT7
0
TB15
0
TB7
0
6
SHTLVL
0
DC9
0
DC1
0
P9
0
P1
0
DT6
0
TB14
0
TB6
0
5
HRPOE
0
DC8
0
DC0
0
P8
0
P0
0
DT5
0
TB13
0
TB5
0
4
SHTIF
0
DC7
0
STEP4
0
P7
0
STEP4
0
DT4
0
TB12
0
TB4
0
3
SHTIE
0
DC6
0
STEP3
0
P6
0
STEP3
0
DT3
1
TB11
0
TB3
0
CLKSRC
0
2
1
Bit 0
SHTEN HRPMODE HRPEN
0
0
0
DC5
DC4
DC3
0
0
0
STEP3 STEP1 STEP0
0
0
0
P5
P4
P3
0
0
0
STEP2 STEP1 STEP0
0
0
0
DT2
DT1
DT0
0
0
0
TB10
TB9
TB8
0
0
0
TB2
TB1
TB0
0
0
0
SEL2
SEL1
SEL0
0
0
0
= Unimplemented
Figure 10-2. HRP I/O Register Summary
NOTE
When HRPMODE = 0, STEP[4:0] are mapped into the five least significant
bits of the HRPPERL register.
When HRPMODE = 1, STEP[4:0] are mapped into the five least significant
bits of the HRPDCL register.
10.4 Functional Description
Figure 10-3 provides a block diagram of the module.
MC68HC908LB8 Data Sheet, Rev. 1
Freescale Semiconductor
93