MC68HC908LB8_05 Datasheet, PDF (136/234 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Input/Output (I/O) Ports
NOTES:
1. X = Don’t care
2. I/O pin pulled up to V_DD by internal pullup device
3. Writing affects data register, but does not affect input.
4. Hi-Z = High impedance
14.2.3 Port A Input Pullup Enable Register
The port A input pullup enable register (PTAPUE) contains a software configurable pullup device for each
of the seven port A pins. Each bit is individually configurable and requires that the data direction register,
DDRA, bit be configured as an input. Each pullup is automatically and dynamically disabled when a port
bit’s DDRA is configured for output mode.
Address:
Read:
Write:
Reset:
$000D
Bit 7
-
6
5
4
3
2
1
Bit 0
PTA6PUE PTA5PUE PTA4PUE PTA3PUE PTA2PUE PTA1PUE PTA0PUE
0
0
0
0
0
0
0
Figure 14-5. Port A Input Pullup Enable Register (PTAPUE)
PTA6PUE–PTA0PUE — Port A Input Pullup Enable Bits
These writable bits are software programmable to enable pullup devices on an input port bit.
1 = Corresponding port A pin configured to have internal pullup
0 = Corresponding port A pin has internal pullup disconnected
14.3 Port B
Port B is an 8-bit special-function port that shares all eight of its pins with the high resolution PWM (HRP),
pulse-width modulator (PWM) module, and op amp/comparator module. See Table 1-1 . Pin Functions
for a description of the priority of these functions.
14.3.1 Port B Data Register
The port B data register (PTB) contains a data latch for each of the eight port pins.
Address:
Read:
Write:
Reset:
$0001
Bit 7
PTB7
6
PTB6
5
PTB5
4
3
PTB4
PTB3
Unaffected by reset
2
PTB2
1
PTB1
Bit 0
PTB0
Figure 14-6. Port B Data Register (PTB)
PTB7–PTB0 — Port B Data Bits
These read/write bits are software-programmable. Data direction of each port B pin is under the control
of the corresponding bit in data direction register B. Reset has no effect on port B data.
MC68HC908LB8 Data Sheet, Rev. 1
136
Freescale Semiconductor