MC68HC908LB8_05 Datasheet, PDF (209/234 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Monitor Module (MON)
NOTE
For entry into normal monitor mode, the IRQ pin must be at V_TST before
V_DD is applied to the device.
• If $FFFE and $FFFF contain $FF (erased state):
– The external clock is 9.8304 MHz
– IRQ = V_DD (this can be implemented through the internal IRQ pullup)
• If $FFFE and $FFFF contain $FF (erased state):
– IRQ = V_SS (internal oscillator is selected, no external clock required)
– The bus clock generated by the internal oscillator — 4 MHz bus
NOTE
Location $FFC0 is programmed at the factory with an oscillator trim value
that will allow communication at 9600 baud. Erasing this location may
prevent communication with the device.
MC68HC908LB8 Data Sheet, Rev. 1
Freescale Semiconductor
209