MC68HC908LB8_05 Datasheet, PDF (40/234 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Memory
NOTE
Programming and erasing of FLASH locations cannot be performed by
code being executed from the FLASH memory. While these operations
must be performed in the order shown, other unrelated operations may
occur between the steps. Do not exceed t_PROG maximum, see 20.12
Memory Characteristics.
It is highly recommended that interrupts be disabled during program/erase operations.
Do not exceed t_PROG maximum or t_HV maximum. t_HV is defined as the cumulative high voltage
programming time to the same row before next erase. t_HV must satisfy this condition:
t_NVX = t_NVH + t_PGS + (t_PROG x 32) <= t_HV maximum
Refer to 20.12 Memory Characteristics.
The time between programming the FLASH address change (step 7 to step 7), or the time between the
last FLASH programmed to clearing the PGM bit (step 7 to step 10) must not exceed the maximum
programming time, t_PROG maximum.
CAUTION
Be cautious when programming the FLASH array to ensure that
non-FLASH locations are not used as the address that is written to when
selecting either the desired row address range in step 3 of the algorithm or
the byte to be programmed in step 7 of the algorithm. This applies
particularly to $FFD4–$FFDF.
2.6.5 FLASH Block Protection
Due to the ability of the on-board charge pump to erase and program the FLASH memory in the target
application, provision is made for protecting a block of memory from unintentional erase or program
operations due to system malfunction. This protection is done by using of a FLASH block protect register
(FLBPR). The FLBPR determines the range of the FLASH memory which is to be protected. The range
of the protected area starts from a location defined by FLBPR and ends at the bottom of the FLASH
memory ($FFFF). When the memory is protected, the HVEN bit cannot be set in either ERASE or
PROGRAM operations.
NOTE
In performing a program or erase operation, the FLASH block protect
register must be read after setting the PGM or ERASE bit and before
asserting the HVEN bit
When the FLBPR is program with all 0’s, the entire memory is protected from being programmed and
erased. When all the bits are erased (all 1’s), the entire memory is accessible for program and erase.
When bits within the FLBPR are programmed, they lock a block of memory, address ranges as shown in
2.6.6 FLASH Block Protect Register. Once the FLBPR is programmed with a value other than $FF, any
erase or program of the FLBPR or the protected block of FLASH memory is prohibited. The presence of
a V_TST on the IRQ pin will bypass the block protection so that all of the memory included in the block
protect register is open for program and erase operations.
NOTE
The FLASH block protect register is not protected with special hardware or
software. Therefore, if this page is not protected by FLBPR the register is
erased by either a page or mass erase operation.
MC68HC908LB8 Data Sheet, Rev. 1
40
Freescale Semiconductor