MC68HC908LB8_05 Datasheet, PDF (137/234 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Port B
14.3.2 Data Direction Register B
Data direction register B (DDRB) determines whether each port B pin is an input or an output. Writing a
1 to a DDRB bit enables the output buffer for the corresponding port B pin; a 0 disables the output buffer.
Address:
Read:
Write:
Reset:
$0005
Bit 7
DDRB7
0
6
DDRB6
0
5
DDRB5
0
4
DDRB4
0
3
DDRB3
0
2
DDRB2
0
1
DDRB1
0
Figure 14-7. Data Direction Register B (DDRB)
Bit 0
DDRB0
0
DDRB7–DDRB0 — Data Direction Register B Bits
These read/write bits control port B data direction. Reset clears DDRB7–DDRB0, configuring all port
B pins as inputs.
1 = Corresponding port B pin configured as output
0 = Corresponding port B pin configured as input
NOTE
Avoid glitches on port B pins by writing to the port B data register before
changing data direction register B bits from 0 to 1.
Figure 14-8 shows the port B I/O logic.
READ DDRB ($0005)
WRITE DDRB ($0005)
RESET
WRITE PTB ($0001)
DDRBx
PTBx
PTBx
READ PTB ($0001)
Figure 14-8. Port B I/O Circuit
When bit DDRBx is a 1, reading address $0001 reads the PTBx data latch. When bit DDRBx is a 0,
reading address $0001 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit. Table 14-2 summarizes the operation of the port B pins.
MC68HC908LB8 Data Sheet, Rev. 1
Freescale Semiconductor
137