MC68HC908LB8_05 Datasheet, PDF (92/234 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

High Resolution PWM (HRP)
M68HC08 CPU
CPU
REGISTERS
ARITHMETIC/LOGIC
UNIT (ALU)
CONTROL AND STATUS
REGISTERS — 64 BYTES
USER FLASH — 8 KBYTES
USER RAM — 128 BYTES
INTERNAL BUS
DUAL CHANNEL PWM
MODULE
HIGH RESOLUTION PWM
MODULE
LOW-VOLTAGE INHIBIT
MODULE
PTA6⁽¹⁾/AD5/TCH0/KBI6
PTA5⁽¹⁾/RST/KBI5
PTA4⁽¹⁾/AD4/KBI4
PTA3⁽¹⁾/AD3/KBI3
PTA2⁽¹⁾/AD2/KBI2
PTA1⁽¹⁾/AD1/KBI1
PTA0⁽¹⁾/AD0/KBI0
MONITOR ROM — 350 BYTES
FLASH PROGRAMMING
ROUTINES ROM — 674 BYTES
USER FLASH VECTOR SPACE — 34 BYTES
OSCILLATOR
MODULE
COMPUTER OPERATING
PROPERLY MODULE
2-CHANNEL TIMER
MODULE
8-BIT ANALOG-TO-DIGITAL
CONVERTER MODULE
PTB7/V_OUT/AD6/FAULT⁽²⁾
PTB6/V–
PTB5/V+
PTB4/PWM1
PTB3/PWM0
PTB2/FAULT⁽²⁾
PTB1/BOT
PTB0/TOP
SYSTEM INTEGRATION
MODULE
KEYBOARD INTERRUPT
MODULE
PTC2⁽¹⁾/SHTDWN/IRQ
PTC1⁽¹⁾/OSC2
PTC0⁽¹⁾/OSC1
V_DD
POWER
V_SS
Notes:
1. Pin contains integrated pullup device.
2. Fault function switchable between pins PTB2 and PTB7.
OP AMP/COMPARATOR
MODULE
Figure 10-1. Block Diagram Highlighting HRP Block and Pins
NOTE
Setting the HRPOE bit in the HRPCTRL register forces the corresponding
HRP output pins to be outputs, overriding the data direction register. In
order to read the states of the pins, the data direction register bit must be
a 0.
Setting the SHTEN bit in the HRPCTRL register forces the SHTDWN pin to
be an input, overriding the data direction register. In order to read the state
of the pin, the data direction register bit must be a 0.
MC68HC908LB8 Data Sheet, Rev. 1
92
Freescale Semiconductor