MC68HC908LB8_05 Datasheet, PDF (55/234 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Low Power Modes
In order to read the digital states of the pins configured as inputs, the data
direction register bit must be a 0; to read the states of the pins configured
as outputs the data direction register bit must be a 1.
OACE
V+
GROUND
V–
GROUND
OACE
OACE
+
-
OACE
Figure 4-2. Op Amp/Comparator Block Diagram
V_OUT
FLOATING
4.5 Low Power Modes
4.5.1 Wait Mode
The WAIT instruction places the MCU in a low power consumption mode. While in WAIT the op
amp/comparator cannot be enabled or disabled. If the op amp/comparator module is not needed during
wait mode, reduce power consumption by disabling the op amp/comparator before executing the WAIT
command.
4.5.2 Stop Mode
The op amp/comparator is inactive after execution of the STOP command. The
op amp/comparator will be in a low-power state and will not drive its output pin. When the MCU exits stop
mode after and external interrupt, the op amp/comparator continues operation.
4.6 Op Amp/Comparator Control Register
There is a single operational control register (OACCR) that contains the enable bit for the op
amp/comparator.
Address: $0039
Bit 7
Read:
Write:
Reset:
OACM
0
6
5
U
U
= Unimplemented
4
3
2
U
U
U
U = Unaffected
1
Bit 0
OACE
U
0
Figure 4-3. Op Amp/Comparator Control Register (OACCR)
OACM — Op Amp/Comparator Mode Select Bit
This bit selects between 2 modes of operation, op amp mode and comparator mode.
1 = Op amp mode selected
MC68HC908LB8 Data Sheet, Rev. 1
Freescale Semiconductor
55