MC68HC908LB8_05 Datasheet, PDF (75/234 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Instruction Set Summary
Source
Form
DEC opr
DECA
DECX
DEC opr,X
DEC ,X
DEC opr,SP
DIV
EOR #opr
EOR opr
EOR opr
EOR opr,X
EOR opr,X
EOR ,X
EOR opr,SP
EOR opr,SP
INC opr
INCA
INCX
INC opr,X
INC ,X
INC opr,SP
JMP opr
JMP opr
JMP opr,X
JMP opr,X
JMP ,X
JSR opr
JSR opr
JSR opr,X
JSR opr,X
JSR ,X
LDA #opr
LDA opr
LDA opr
LDA opr,X
LDA opr,X
LDA ,X
LDA opr,SP
LDA opr,SP
LDHX #opr
LDHX opr
LDX #opr
LDX opr
LDX opr
LDX opr,X
LDX opr,X
LDX ,X
LDX opr,SP
LDX opr,SP
LSL opr
LSLA
LSLX
LSL opr,X
LSL ,X
LSL opr,SP
Table 7-1. Instruction Set Summary (Sheet 4 of 7)
Operation
Decrement
Divide
Exclusive OR M with A
Increment
Jump
Jump to Subroutine
Load A from M
Load H:X from M
Load X from M
Logical Shift Left
(Same as ASL)
Description
M ← (M) – 1
A ← (A) – 1
X ← (X) – 1
M ← (M) – 1
M ← (M) – 1
M ← (M) – 1
A ← (H:A)/(X)
H ← Remainder
A ← (A ⊕ M)
M ← (M) + 1
A ← (A) + 1
X ← (X) + 1
M ← (M) + 1
M ← (M) + 1
M ← (M) + 1
PC ← Jump Address
PC ← (PC) + n (n = 1, 2, or 3)
Push (PCL); SP ← (SP) – 1
Push (PCH); SP ← (SP) – 1
PC ← Unconditional Address
A ← (M)
H:X ← (M:M + 1)
X ← (M)
C
b7
0
b0
Effect
on CCR
VH I NZC
DIR
INH

–
–


–
INH
IX1
IX
SP1
– – – –   INH
IMM
DIR
EXT
0
–
–


–
IX2
IX1
IX
SP1
SP2
DIR
INH

–
–


–
INH
IX1
IX
SP1
DIR
EXT
– – – – – – IX2
IX1
IX
DIR
EXT
– – – – – – IX2
IX1
IX
IMM
DIR
EXT
0
–
–


–
IX2
IX1
IX
SP1
SP2
0
–
–


–
IMM
DIR
IMM
DIR
EXT
0
–
–


–
IX2
IX1
IX
SP1
SP2
DIR
INH

–
–



INH
IX1
IX
SP1
3A dd 4
4A
1
5A
1
6A ff
4
7A
3
9E6A ff
5
52
7
A8 ii
2
B8 dd 3
C8 hh ll 4
D8 ee ff 4
E8 ff
3
F8
2
9EE8 ff
4
9ED8 ee ff 5
3C dd 4
4C
1
5C
1
6C ff
4
7C
3
9E6C ff
5
BC dd 2
CC hh ll 3
DC ee ff 4
EC ff
3
FC
2
BD dd 4
CD hh ll 5
DD ee ff 6
ED ff
5
FD
4
A6 ii
2
B6 dd 3
C6 hh ll 4
D6 ee ff 4
E6 ff
3
F6
2
9EE6 ff
4
9ED6 ee ff 5
45 ii jj 3
55 dd 4
AE ii
2
BE dd 3
CE hh ll 4
DE ee ff 4
EE ff
3
FE
2
9EEE ff
4
9EDE ee ff 5
38 dd 4
48
1
58
1
68 ff
4
78
3
9E68 ff
5
MC68HC908LB8 Data Sheet, Rev. 1
Freescale Semiconductor
75