MC68HC908LB8_05 Datasheet, PDF (61/234 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Functional Description
Address: $001F
Bit 7
6
5
4
3
Read:
0
COPRS LVISTOP LVIRSTD LVIPWRD
Write:
Reset: 0
0
0
0
0
= Unimplemented
2
SSREC
0
1
STOP
0
Figure 5-2. Configuration Register 1 (CONFIG1)
Bit 0
COPD
0
COPRS — COP Rate Select Bit
COPD selects the COP timeout period. Reset clears COPRS. See Chapter 6 Computer Operating
Properly (COP) Module
1 = COP timeout period = 2¹³ – 2⁴ BUSCLKX4 cycles
0 = COP timeout period = 2¹⁸ – 2⁴ BUSCLKX4 cycles
LVISTOP — LVI Enable in Stop Mode Bit
When the LVIPWRD bit is clear, setting the LVISTOP bit enables the LVI to operate during stop mode.
Reset clears LVISTOP.
1 = LVI enabled during stop mode
0 = LVI disabled during stop mode
LVIRSTD — LVI Reset Disable Bit
LVIRSTD disables the reset signal from the LVI module. See Chapter 12 Low-Voltage Inhibit (LVI).
1 = LVI module resets disabled
0 = LVI module resets enabled
LVIPWRD — LVI Power Disable Bit
LVIPWRD disables the LVI module. See Chapter 12 Low-Voltage Inhibit (LVI).
1 = LVI module power disabled
0 = LVI module power enabled
SSREC — Short Stop Recovery Bit
SSREC enables the CPU to exit stop mode with a delay of 32 BUSCLKX4 cycles instead of a
4096-BUSCLKX4 cycle delay.
1 = Stop mode recovery after 32 BUSCLKX4 cycles
0 = Stop mode recovery after 4096 BUSCLKX4 cycles
NOTE
Exiting stop mode by an LVI reset will result in the long stop recovery.
If running with external crystal, it is advisable to set the short stop recovery bit to 0. The short stop
recovery does not provide enough time for oscillator stabilization and for this reason the SSREC bit
should not be set.
When using the LVI during normal operation but disabling during stop mode, the LVI will have an
enable time of t_EN. The system stabilization time for power-on reset and long stop recovery (both 4096
BUSCLKX4 cycles) gives a delay longer than the LVI enable time for these startup scenarios. There
is no period where the MCU is not protected from a low-power condition. However, when using the
short stop recovery configuration option, the 32-BUSCLKX4 delay must be greater than the LVI’s turn
on time to avoid a period in startup where the LVI is not protecting the MCU.
MC68HC908LB8 Data Sheet, Rev. 1
Freescale Semiconductor
61