MC68HC908LB8_05 Datasheet, PDF (134/234 Pages) Freescale Semiconductor, Inc – M68HC08 Microcontrollers

Input/Output (I/O) Ports
Addr.
$000D
$000E
Register Name
Port A Input Pullup Enable ^Read:
Register (PTAPUE) Write:
See page 136. _Reset:
Port C Input Pullup Enable ^Read:
Register (PTCPUE) Write:
See page 140. _Reset:
Bit 7
-
OSC2EN
0
6
5
PTA6PUE PTA5PUE
0
0
0
0
0
0
= Unimplemented
4
PTA4PUE
0
0
0
3
PTA3PUE
0
0
0
2
PTA2PUE
0
PTCPUE2
0
1
PTA1PUE
0
PTCPUE1
0
Bit 0
PTA0PUE
0
PTCPUE0
0
Figure 14-1. I/O Port Register Summary (Continued)
14.2 Port A
Port A is an 7-bit special-function port that shares all of its pins with the keyboard interrupt (KBI) module,
the analog-to-digital converter (ADC) module, the reset pin, and timer channel 0. See Table 1-1 . Pin
Functions for a description of the priority of these functions. Port A also has software configurable pullup
devices if configured as an input port.
14.2.1 Port A Data Register
The port A data register (PTA) contains a data latch for each of the seven port A pins.
Address:
Read:
Write:
Reset:
$0000
Bit 7
6
PTA6
5
PTA5
= Unimplemented
4
3
PTA4
PTA3
Unaffected by reset
2
PTA2
1
PTA1
Bit 0
PTA0
Figure 14-2. Port A Data Register (PTA)
PTA6–PTA0 — Port A Data Bits
These read/write bits are software programmable. Data direction of each port A pin is under the control
of the corresponding bit in data direction register A. Reset has no effect on port A data.
KBD6–KBD0 — Keyboard Inputs
The keyboard interrupt enable bits, KBIE6–KBIE0, in the keyboard interrupt control register (KBICR)
enable the port A pins as external interrupt pins. See Chapter 9 Keyboard Interrupt Module (KBI).
14.2.2 Data Direction Register A
Data direction register A (DDRA) determines whether each port A pin is an input or an output. Writing a
1 to a DDRA bit enables the output buffer for the corresponding port A pin; a 0 disables the output buffer.
MC68HC908LB8 Data Sheet, Rev. 1
134
Freescale Semiconductor